1. Field of the Invention
This invention relates to a data processing circuit and semiconductor integrated circuit device, a microcomputer comprising such a data processing circuit, and electronic equipment comprising such a microcomputer.
2. Description of Related Art
At present, a Reduced Instruction Set Computer (RISC)-architecture microcomputer that is capable of handling 32-bit data uses instruction codes of a fixed 32-bit width. The use of fixed-length instruction codes makes it possible to shorten the time required for decoding the instructions, in comparison with an architecture that uses variable-length instruction codes, and it also enables a reduction in the size of the circuitry of the microcomputer.
However, a 32-bit width is not particularly necessary for many instruction codes, even in a 32-bit microcomputer. Therefore, if all the coding of instructions has to be written to fit a 32-bit width, many of the instructions will generate unnecessarily long portions in the coding, reducing the efficiency of memory usage.
In such a case, it is possible to compress unnecessarily long instruction codes by logical means and execute the instructions while decoding them on the fly within the microcomputer. However, this method raises a problem in that it requires complicated control circuitry.
The present inventors have therefore investigated the use of a microcomputer that handles fixed-length instruction codes of a bit width that is less than that of data that the microcomputer handles, in order to improve the efficiency of memory usage without using complicated control circuitry.
However, if, for example, 32-bit fixed-length instruction codes were simply converted into 16-bit fixed-length coding, the problem described below will arise.
Since each instruction code contains an operation code and operands other than immediate data, the number of bits of immediate data that can be used is much less than 16 bits, even when 16-bit instruction codes are used. In other words, the problem arises that less than 16 bits of immediate data can be specified by an instruction code, regardless of whether the architecture can handle 32-bit data.
It is also difficult to ensure fields for the operands of a three-operand instruction with 16-bit instruction codes. This causes problems in that it is not clear how to handle operations that are difficult to express as such short instruction codes.
In order to solve the above described problem, it is necessary to have a function that can expand the immediate data comprises within short instruction codes, as necessary. It is also necessary to have a function that can expand operational details, in order to execute operations that cannot be written into short instruction codes.